Memory is utilized in modern computing architectures for storing data. One type of memory is Dynamic Random-Access Memory (DRAM). DRAM may provide advantages of structural simplicity, low cost and high speed in comparison to alternative types of memory.
DRAM may utilize memory cells which each have one capacitor in combination with one transistor (so-called 1T-1C memory cells), with the capacitor being coupled with a source/drain region of the transistor.
The transistors associated with the memory cells may be referred to as access transistors. In some applications, the transistors may have a channel region extending vertically between a pair of source/drain regions. Such transistors may be referred to as vertical transistors. Vertical transistors may be tightly packed within a memory array, and accordingly may be suitable for high levels of integration. However, it is becoming increasingly difficult to achieve desired electrical isolation of neighboring vertical transistors with increasing levels of integration.
Conventional isolation utilizes silicon dioxide as an insulative material provided between neighboring vertical transistors. However, oxygen may problematically diffuse from the silicon dioxide into materials associated with memory arrays (e.g., metal-containing digit-line materials, metal-containing wordline materials, etc.). The oxygen may diffuse from the silicon dioxide into materials during deposition, and/or during densification with O2. Accordingly, silicon nitride is provided between the bulk silicon dioxide and other materials, with the silicon nitride providing a barrier to preclude oxygen migration from the silicon dioxide into the other materials. However, the silicon nitride presents its own problems. For instance, silicon nitride traps charge, and such charge-trapping properties may become increasingly problematic with increasing levels of integration. Also, silicon nitride has a relatively high dielectric constant (greater than 7) which may increase the likelihood of parasitic capacitance between adjacent conductive features. Further, it is generally difficult to form a continuous layer of silicon nitride having a thickness of less than 30 angstroms (Å), which can limit scalability of insulative structures comprising silicon nitride. Finally, silicon nitride may induce undesired stresses if the silicon nitride is provided directly against a semiconductor material. Accordingly, the silicon nitride is generally spaced from semiconductor materials by thin layers of silicon dioxide (referred to as pad oxide). Such adds additional processing and associated costs; and further may problematically lead to silicon dioxide being provided in locations where oxygen diffusion would best be avoided.
It would be desirable to develop architectures which alleviate the above-discussed difficulties, and to develop methods of forming such architectures.